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| UPC4741C资料 | |
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UPC4741C PDF Download |
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File Size : 105 KB
Manufacturer:NEC Description:Notes: 5. For detailed information about data retention after 100K cycles, please see Cypress qualification report. 6. Hysteresis values are on the condition that the input signal swing is 200 mV greater than the programmed value. 7. Must be disabled if data rate is 1.25 Mbps or greater. 8. Receiver input, VD = VCP0 C VCP1, at least 200 mV greater than hysteresis levels. See Figure 1. 9. CP0 and CP1 inputs each 0.60 Vp C p, 1.25 MHz sine wave 180 out of phase with each other as shown in Figure 8. VDD = 5.00 V 5%. 10. tPLH: Time from input switching states from low to high to output switching states. tPHL: Time from input switching states from high to low to output switching states. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：UPC4741C 厂 家：NEC 封 装：03+04+ 批 号：20 数 量： 说 明： |
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