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| SN74F543DWR资料 | |
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SN74F543DWR PDF Download |
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File Size : 105 KB
Manufacturer:TI Description:For multiple FPGAs configured as a daisy-chain, or for future FPGAs requiring larger configuration memories, cas- caded Configurators provide additional memory. As the last bit from the first Configurator is read, the clock signal to the Configurator asserts its CEO output Low and disables its DATA line. The second Configurator recog- nizes the Low level on its CE input and enables its DATA output. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：SN74F543DWR 厂 家：TI 封 装：04+/92+ 批 号：60 数 量： 说 明： |
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运 费： 所在地： 新旧程度： |
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