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| SN54LS399J资料 | |
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SN54LS399J PDF Download |
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File Size : 105 KB
Manufacturer:TI Description:Bit Clock (For MPI)/Data Clock (For GCI). In MPI mode, BCLK pin clocks out the PCM data on DX1 or DX2 pin and clock in PCM data from DR1 or DR2 pin. It may vary from 512kHz to 8.192 MHz, and is required to be synchronous with FS. In GCI mode, DCL pin is either 2.048 MHz or 4.096 MHz. The frequency is selected by CI/DOUBLE pin. When CI/DOUBLE pin is low, DCL will be 2.048 MHz; when CI/DOUBLE pin is high, DCL will be 4.096 MHz. It is recommended to connect MCLK and DCL pin together. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：SN54LS399J 厂 家：TI 封 装：0020+ 批 号：3 数 量： 说 明： |
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