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SN54LS398J

SN54LS398J资料
SN54LS398J
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File Size : 105 KB
Manufacturer:MOT
Description:INITIALIZATION   During the microprocessor initialization routine, the microprocessor should program the desired active paths through the matrices, and put all other channels into the high impedance state. Care should be taken that no two Connected TX outputs drive the bus simultaneously. With the CMH setup, the microprocessor controlling the matrices can bring the ODE signal high to relinquish high impedance state control to the Connection Memory High bits outputs.   The reset pin is designed to be used with board reset circuitry. During reset the TX serial streams will be put into high-impedance and the state of internal registers and counters will be reset. As the connection memory can be in any state after a power up, the ODE pin should be used to hold the TX streams in high-impedance until the per-channel output enable control in the connection memory high is appropriately programmed. The main difference between ODE and reset is, reset alters the state of the registers and counters where as ODE controls only the high-impedance state of the TX streams. RESET input is only provided on the SSOP packages.
 
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型 号:SN54LS398J
厂 家:MOT
封 装:88+
批 号:49
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