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| SN54LS00J资料 | |
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SN54LS00J PDF Download |
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File Size : 105 KB
Manufacturer:TI Description:The A63L73321 is a high-speed, low-power SRAM containing 4,194,304 bits of bit synchronous memory, organized as 131,072 words by 32 bits. The A63L73321 combines advanced synchronous peripheral circuitry, 2-bit burst control, input registers, output buffer and a 128K X 32 SRAM core to provide a wide range of data RAM applications. The positive edge triggered single clock input (CLK) controls all synchronous inputs passing through the registers. Synchronous inputs include all addresses (A0 - A16), all data inputs (I/O1 - I/O32), active LOW chip enable ( CE ), two additional chip enables (CE2, CE2 ), burst control inputs ( ADSC , ADSP , ADV ), byte write enables ( BWE , BW1 , BW2 , BW3 , BW4 ) and Global Write ( GW ). Asynchronous inputs include output enable ( OE ), clock (CLK), BURST mode (MODE) and SLEEP mode (ZZ). |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：SN54LS00J 厂 家：TI 封 装：0919+ 批 号：1800 数 量： 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：张小姐、 颜先生13661569158 |
| 电 话：400-878-9158,021-54286636 |
| 手 机：13661569158 |
| QQ：12230627,596815151,531081618 |
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| 传 真：021-54286636 |
| EMail：susumu@susumu.com.cn |
| 公司地址： 上海市古楼公路348弄25号 |
