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| OPA2111KP资料 | |
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OPA2111KP PDF Download |
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File Size : 105 KB
Manufacturer:TI Description:The logic element for data flow in each direction is configured by two mode (IMODE1 and IMODE0 for B to A, OMODE1 and OMODE0 for A to B) inputs as a buffer, a D-type flip-flop, or a D-type latch. When configured in the buffer mode, the input data appears at the output port. In the flip-flop mode, data is stored on the rising edge of the appropriate clock (CLKAB/LEAB or CLKBA/LEBA) input. In the latch mode, the clock inputs serve as active-high transparent latch enables. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：OPA2111KP 厂 家：TI 封 装：0923+ 批 号：10 数 量：DIP8 说 明：DIP8 |
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运 费： 所在地： 新旧程度： |
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