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M51995FP

M51995FP资料
M51995FP
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File Size : 105 KB
Manufacturer:MIT
Description:• 1.8V+0.1V/-0.1V Power Supply. • DLL circuitry for wide output data valid window and future   freguency scaling. • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O,   1.8V+0.1V/-0.1V for 1.8V I/O. • Separate independent read and write data ports   with concurrent read and write operation • HSTL I/O • Full data coherency, providing most current data . • Synchronous pipeline read with self timed early write. • Registered address, control and data input/output. • DDR(Double Data Rate) Interface on read and write ports. • Fixed 2-bit burst for both read and write operation. • Clock-stop supports to reduce current. • Two input clocks(K and K) for accurate DDR timing at clock   rising edges only. • Two input clocks for output data(C and C) to minimize   clock-skew and flight-time mismatches. • Two echo clocks (CQ and CQ) to enhance output data   traceability. • Single address bus. • Byte write (x9, x18, x36) function. • Sepatate read/write control pin(R and W) • Simple depth expansion with no data contention. • Programmable output impenance. • JTAG 1149.1 compatible test access port. • 165FBGA(11x15 ball array FBGA) with body size of 13x15mm
 
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型 号:M51995FP
厂 家:MIT
封 装:02+
批 号:6
数 量:
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