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| DS1004Z-2资料 | |
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DS1004Z-2 PDF Download |
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File Size : 105 KB
Manufacturer:DS Description:The Functional Block Diagram on Page 1 shows the architecture of the ADSP-219x dual core DSP, while the block diagram of Figure 1 illustrates the ADSP-219x DSP core. Each core contains three independent computational units: the multi- plier/accumulator (MAC), the ALU, and the shifter. The computational units process 16-bit data from the register file and have provisions to support multiprecision computations. The ALU performs a standard set of arithmetic and logic operations; division primitives are also supported. The MAC performs single-cycle multiply, multiply/add, and multiply/subtract oper- ations. The MAC has two 40-bit accumulators that help with overflow. The shifter performs logical and arithmetic shifts, nor- malization, denormalization, and derive exponent operations. The shifter can be used to efficiently implement numeric format control, including multiword and block floating-point representations. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：DS1004Z-2 厂 家：DS 封 装：00+ 批 号：199 数 量： 说 明： |
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