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| CD74HCT4020E资料 | |
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CD74HCT4020E PDF Download |
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File Size : 105 KB
Manufacturer:HARIS Description:VERTICAL SYNC OUTPUT A vertical sync output is derived by internally integrating the composite sync waveform (Figure 2). To understand the generation of the vertical sync pulse, refer to the lower left hand section Figure 2. Note that there are two comparators in the section. One comparator has an internally generated voltage reference called V1 going to one of its inputs. The other comparator has an internally generated voltage refer- ence called V2 going to one of its inputs. Both comparators have a common input at their noninverting input coming from the internal integrator. The internal integrator is used for integrating the composite sync signal. This signal comes from the input side of the composite sync buffer and are positive going sync pulses. The capacitor to the integrator is internal to the LM1881. The capacitor charge current is set by the value of the external resistor RSET. The output of the integrator is going to be at a low voltage during the normal horizontal lines because the integrator has a very short time to charge the capacitor, which is during the horizontal sync period. The equalization pulses will keep the output voltage of the integrator at about the same level, below the V1. During the vertical sync period the narrow going positive pulses shown in Figure 1 is called the serration pulse. The wide negative portion of the vertical sync period is called the vertical sync pulse. At the start of the vertical sync period, |
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| 价 格 | |||||
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型 号：CD74HCT4020E 厂 家：HARIS 封 装：94+ 批 号：24 数 量： 说 明： |
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