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| AQW614E资料 | |
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AQW614E PDF Download |
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File Size : 105 KB
Manufacturer:NAIS Description:NOTES 1Typicals represent average readings at 25C and VDD = 5 V, VSS = 0 V. 2Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I W = VDD/R for both VDD = 5 V, VSS = 0 V. 3VAB = VDD, Wiper (VW) = No connect. 4INL and DNL are measured at V W with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V A = VDD and VB = 0 V. DNL specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions. 5Resistor Terminals A, B, W have no limitations on polarity with respect to each other. 6Guaranteed by design and not subject to production test. 7Measured at the A X terminals. All A X terminals are open-circuited in shut-down mode. 8PDISS is calculated from (IDD VDD). CMOS logic level inputs result in minimum power dissipation. 9All dynamic characteristics use V DD = 5 V, VSS = 0 V. 10Measured at a V W pin where an adjacent V W pin is making a full-scale voltage change. 11See timing diagram for location of measured values. All input control voltages are specified with t R = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Switching characteristics are measured using V DD = 5 V. 12Propagation delay depends on value of V DD, RL, and CL; see applications text. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：AQW614E 厂 家：NAIS 封 装：06+ 批 号：5 数 量： 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：张小姐、 颜先生13661569158 |
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